A Subthreshold PMOS Analog Cortex Decoder for the (8, 4, 4) Hamming Code

Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS

An all-MOS analog tail-biting MAP decoder is presented for an (8,4) Hamming code. The decoder implements a probability propagation algorithm using subthreshold CMOS networks. Physical results verify the expected behavior of the decoder and demonstrate robustness of analog decoding circuits. The authors of [l] present a class of analog VLSI circuits which can be used to implement a general proba...

Measurements on an analog (8,4,4) Hamming Code Decoder Chip

Fast Maximum-Likelihood Decoder for 4*4 Quasi-Orthogonal Space-Time Block Code

This letter introduces two fast maximum-likelihood (ML) detection methods for 4*4 quasi-orthogonal space-time block code (QOSTBC). The first algorithm with a relatively simple design exploits structure of quadrature amplitude modulation (QAM) constellations to achieve its goal and the second algorithm, though somewhat more complex, can be applied to any arbitrary constellation. Both decoders ut...

Analog-decoder experiments with subthreshold CMOS soft-gates

A collection of analog “soft-gate” CMOS ASICs operating in subthreshold-mode was implemented in a low-cost semi-custom 0.8 μm technology. These soft-gates allow, in particular, the realization of various decoders for simple error correcting codes on the breadboard level. Measurement results are presented for an (8,4,4) Hamming code.

Analog Rotating Ring Decoder for an LDPC Convolutional Code

We present an analog rotating ring decoder for decoding an LDPC convolutional code. The decoder architecture uses a window of soft received L-values K time units in the past and K time units in the future to decode a given bit. The window of 2K + 1 time units is arranged in a ring structure, and decoding proceeds in a continuous fashion by rotating around the ring. Simulation results indicate p...